1. Field of the Invention
The present invention relates to electronic packaging. More particularly, the present invention relates to electronic packaging of flip chip carriers using land grid array (LGA) interconnection techniques.
2. Background and Related Art
There exists in the prior art a variety of ways of connecting integrated circuit chips to circuit cards or printed circuit boards (PCBs). One prior art approach is to connect the integrated circuit chip directly to the laminate card or PCB. However, one of the difficulties with such connections arises from the large difference in thermal coefficient of expansion (TCE) between the silicon chip and the laminate PCB, for example. This difference creates problems affecting reliability over a large number of thermal cycles. One approach to addressing the problems caused by differences in TCE between chip and PCB is to use some form of intermediate chip carrier. Such carriers offer several advantages including the fact that they may be either single chip carriers or multichip carriers. Typically, they are made of plastic, ceramic or flexible tape-like material. However, typical chip carriers made of ceramic, for example, also have limitations in regard to overall reliability, cost and ease of assembly. Intermediate structures known as interposers, are also employed in a variety of design configurations to connect chips or chip carriers to laminate cards or PCBs. Typically, these interposers are designed to offer some additional form of compliance or compressibility in connecting chips or chip carriers to cards or PCBs so as to avoid stress, fracturing and the like caused by differences in TCE between chip or chip carrier and card or PCB. One application of interposers is in LGA interconnections between chip carrier or substrate and card or PCB. In order to ensure reliable, low electrical resistivity connections between pads on the card or PCB and pads on the substrate, the substrate LGA pads are clamped against the card or PCB LGA pads, via an electrically conductive interposer.
Since LGA interconnects rely on good surface contact between mating pads for reliable electrical connection, a constant and uniform compressive force must be maintained between the mating pads throughout the life of the electronic device in order to maintain reliable electrical interconnection. Thus, a primary requirement for LGA connectors is rigidity of the mating arrays. This requirement has led to complex and costly packaging arrangement, designed to prevent deflections of the card or PCB and components when large arrays of interconnections are employed. Typically, such arrangements have employed rigid substrates, such as a ceramic with attendant disadvantages.
Various forms of LGA interconnection structures exist in the prior art. For example, U.S. Pat. No. 5,841,194 to Tsukamoto teaches the use of peripheral stiffeners to help prevent a card or PCB deflections. Similarly, U.S. Pat. No. 5,703,753 to Mek teaches the use of peripheral contact interposer structures with a heat dissipation assembly. U.S. Pat. No. 5,473,510 to Dozier teaches structures that reduce size and complexity of apparatus used to attach LGA IC packages to PCB. However, such structures fail to provide a simple, low-cost, low-profile LGA package that provides effective heat dissipation means and, at the same time, effectively limits deflections in the PCB or circuit card and its component.
Since no solder reflow is required to make LGA interconnections, such interconnections offer an advantage when used with temperature sensitive modules, such as, some opto-electronic packages. However, such modules clearly require effective thermal dissipation during operation which has, heretofor, been difficult to achieve.
Accordingly, it is an object of the present invention to provide an improved electronic package and method of making same.
It is a further object of the present invention to provide an improved LGA interconnection arrangement and method therefor.
It is yet a further object of the present invention to provide an improved electronic packaging arrangement and method therefor that acts to effectively dissipate heat and, at the same time, prevents deflections in the PCB or circuit card and components thereon.
It is still yet a further object of the present invention to provide an improved chip carrier cooling and interconnection method and structure for use in LGA interconnection between chip and card or PBC.
It is another object of the present invention to provide a simple, low cost LGA packaging arrangement which prevents deflections in PCB or circuit card and components and, at the same time, provides for two effective opposing heat dissipation paths.
It is yet another object of the present invention to provide an improved LGA packaging arrangement which reduces cost and complexity, improves performance and reliability and provides reduced package height.
In accordance with the present invention, a flip-chip package is interconnected to a PCB or card through a peripheral LGA interposer connector. The flip-chip is mounted below the chip carrier or substrate on the same surface as the LGA interconnection pads and projects into a central opening in the peripheral LGA interposer. An opening in the upper stiffener of the circuit card permits the LGA interposer interconnection pads to make contact with LGA circuit card pads. A primary, upper heat sink is arranged to be in thermal contact with the entire surface of the substrate. An opening provided in the PBC or circuit card and lower stiffeners allows additional heat dissipation. For example, the opening allows access for a second, lower heat sink to be thermally coupled to the chip so as to efficiently facilitate this additional heat dissipation. Alternatively, the lower stiffener may be eliminated altogether whereby the lower heat sink effectively acts as both the lower stiffener and additional heat dissipation means.